
1. 原理介绍
 


 
2. 代码
//        Model  - GV026WVQ-1QP0
 //        IC     - GH7006
 //        Width  - 800
 //        Height - 480
 //        REV:   - V01
 //        DATA   - 20240507
 //        INTERFACE- MIPI
//"Vfp" value="16" />
 //"Vbp" value="8" />
 //"Vsync" value="8" />
 //"Hfp" value="160" />
 //"Hbp" value="80" />
 //"Hsync" value="80" />
 //2POWER  IOVCC=3.3V   VCI=3.3/ 
 //3POWER  IOVCC=1.8V-3.3   VCI=VSP=5.8/  VSN=-5.8
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x01); // ENTER PAGE1  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x07);       
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x12);   
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0a,0x56); // vcom   
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x17,0x32); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x21,0x01);   
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x28,0x20); //vgh 14.8
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x29,0x2a); //vgl 15.0
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2a,0x62);  //  MUST 62
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2C,0x00); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2F,0xf3);  //  VCSW 2POWER MODE USE 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x02); // ENTER PAGE2          
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x39,0xC0); //VSPNR   
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x00);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x0c); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x02,0x10); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x03,0x07);  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x04,0x0d);  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x05,0x2e);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x06,0x0C);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x07,0x0E);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x08,0x0f);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x09,0x0e); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0A,0x11); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0b,0x52);  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0c,0x13);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0d,0x19);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0e,0x37);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0f,0x3b); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x10,0x3F);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x20,0x00); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x21,0x0c);   
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x22,0x10);  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x23,0x07);   
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x24,0x0d);   
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x25,0x2e);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x26,0x0C); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x27,0x0E); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x28,0x0f); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x29,0x0e); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2A,0x11); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2b,0x52);  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2c,0x13);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2d,0x19);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2e,0x37);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2f,0x3b); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x30,0x3F);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x03);          
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0b,0x55);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x04);          
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x00); //800
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x00);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x02,0xf0);//480
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x03,0x03);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x04,0x20); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x06,0x16); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x07,0x05);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x08,0x20); //ss-tp 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x09,0x05);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0a,0x0C);  // SMGIP
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0b,0x00);  //2: 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2a,0x00);  //
/* ///only for bist
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x40,0x80);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x41,0x53);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x43,0x02);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x44,0x82);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x45,0x3F);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x46,0x00);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x47,0x00);
 */
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x05);        
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x01);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x05); //stva 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x02,0x55);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x03,0x05); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x10,0x05);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x11,0x09); //ckva
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x12,0x55);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x13,0x05); //
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x19,0xcd);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x1a,0x73); //
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x23,0x00);  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x40,0x00); //     
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x43,0x00); // 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x44,0x01); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x45,0x81); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x46,0x06); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x47,0x00);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x06); //PAGE6  GIP back 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x23);  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x01);  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x06,0xcd);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x08,0x67);  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x09,0x45);  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0a,0x23); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0b,0x01); 
   
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x07); //PAGE3    
 //GIP LEFT 1-12  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x20,0x16);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x21,0x14);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x22,0x3C);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x23,0x0C);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x24,0x0D); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x25,0x10);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x26,0x12);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x27,0x3F);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x28,0x00);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x29,0x02); //
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2A,0x3C);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x2b,0x3C); 
 //GIP RIGHT 1-12 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x17);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x01,0x15);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x02,0x3C);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x03,0x0C);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x04,0x0D); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x05,0x11);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x06,0x13);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x07,0x3F);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x08,0x01);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x09,0x03); //
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0A,0x3C);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0b,0x3C);
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x08); 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x11,0x83);//83
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x12,0xdA);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x13,0x1c);// 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x18,0x00); 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x0f); //PAGEf
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x01); // dualgate en
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x00);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x00);  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x00);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x36,0x00);
 SetGPIO (3,1, 20);   // GPIO1=0  // GPIO3  SET STBYB HIGE
 Delay(120);
//........................OTP..all...............................................//
 /*
 Delay(200);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x28,0x00);
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x0a);  // ENTER PAGEa 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x07);  // WRITE enable       
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x12);    
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x30,0x78);  //reg_otp_prgm_cycle_set[7:0] 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x31,0x82);  // ternal vpp program  en 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x35,0x02);  //reg_otp_vghl_rt[1:0] 7006 must 02
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x36,0x02);  //  votp ???????  8.0V-8.5V reg_otp_vgh_set[5:0]
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x37,0x01);  //otp_vgh_sel=1 ???votp 
 Delay(200);//120ms
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x00,0x80);  // program all  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x05,0x40);  // dbma1
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x06,0x41);  //reg_prgm_pwrgas1  reg_prgm_pwr_int1
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x08,0x15);  //LVDS dsi mipi page8 reg
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x09,0x40);  //reg_prgm_misc1 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x0d,0x01); // otp vcom
 Delay(200);//120ms
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x78);   // program en 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x69);       
 Delay(200);  //240                                    
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x0a);  
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x07);  // WRITE enable       
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x12);    
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x31,0x02);  // internal vpp program dis 
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x37,0x00);   // vgh sel frome pahe1 
SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xee,0x00);   // ENTER PAGE0  
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xea,0x00);     
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0xeb,0x00);   
 SpiWrite(WIRE3,BIT8,4,0xf1,0x4c,0x01,0x29,0x00);
*/
  



















